In the design of an existing display apparatus such as a liquid crystal display, gate drivers are typically integrated on an array substrate. For a small size display (usually referring to a display smaller than or equal to 19 inches), a structure of integrating gate drivers on a single side would be employed, that is, the gate drivers are only integrated on one end of the gate control lines of the array substrate. However, for a large size display (usually referring to a display larger than 19 inches), a structure of integrating gate drivers on both sides would be employed, that is, the gate drivers are integrated on both ends of the gate control lines of the array substrate. The reason is that the large size panel has a large size, long wiring and high resolution, and the resulting large load (including large resistance and large parasitic capacitance) would delay the gate signal, such that the delayed gate signal would result in negative effects such as insufficient charging of the pixels, non-uniform pictures, and the like. Therefore, all the large size panels as known employ the design of integrating gate drivers on both sides, that is, identical gate drivers are integrated on both ends of the gate control lines. As shown in FIG. 1, the gate driver comprises a plurality of gate driving units 1, the input terminals of the gate driving units 1 are connected to gate timing sequence signal lines Ck1, Ck2, Ck3 and Ck4 respectively, and the output terminals are connected to the (n−1)th, the nth, the (n+1)th and the (n+2)th rows of gate control lines respectively to drive the (n−1)th, the nth, the (n+1)th and the (n+2)th rows of gate control lines respectively. However, such a design makes the gate drivers occupy a large space, and makes the frame of the liquid crystal panel need more space, which affects the product size.